Step 1.
E (up) and DE (down) signal triggered from the
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Step 2.
E (up) and DE (down) signal triggered from the
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Step 3.
E trigger gate (30ns) and
DE trigger gate (5ns).
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Step 4.
E signal and ADC gate triggered on E (~55mV),
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Step 5.
DE signal and ADC gate trigger E signal (~50mv),
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Step 6.
DE signal and ADC gate trigger E signal (-125mV) level.
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Step 7.
Coincidence of E, DE and 125Mhz signals.
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Step 8.
Coincidence of E, DE, and 125 Mhz.
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Step 9.
Like Step 8, but time scale is 2 ns.
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