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fpp-level-shifters.html
FPP Level Shifter Map
The level shifters convert the 1/10th ECL
level signals sent from the chamber readout cards into ECL level
signals sent to the TDCs. The level shufter rack is to the right, as
you enter the lower level platform of the HRS-left detector stack.
There is a power supply in the bottom of the rack, powering 3 crates of
level shifters, each with up to 14 boards. As you face the rack from
the front input side, the slot number increases from 1 on the left /
small angle side to 14 on the right / large angle side..
The level shifters are built so that the order within each cable is
reversed from front to back - an input on channel 1 of a cable will be
an output on channel 16. Channel 1 is to the bottom in the front
inputs, but to the top in the rear outputs. Thus, the brown wire end of
the cables should be up for all outputs and rear chamber inputs, while
the purple wire should be up for the front chamber inputs. (The rear
chambers have the usual convention reversed; they use purple for wire
number 1 rather than brown.)
The cables are labelled according to the order of the channels at the
chamber and at the input to the level shifter. For example, level
shifter 1-1 has V10M3 on input channel 1, but V9M1 on output channel 1.
To understand this labelling, the following information might be
helpful.
The FPP has 11 U, 11 V, and 2 planes. Chambers 1, 2, and 4 each
have 3
U and 3 V planes, while chamber 3 has 2 U, 2 V, and 2 X planes. Thus
plane U10, for example, is the middle of the 3 U planes in chamber 4.
Each plane has from 11 - 17 readout boards, or modules (M), which read
out 2 wire groups of 8 wires, multiplexed onto a single electronics
channel. Thus there are from 22 - 34 TDC channels per plane, and from
about 176 - 272 straws. Depending on which end of the straws the
readout boards were mounted, ascending wire number on the board can
correspond to ascending or descending straw number in a plane.
Cables
in Level Shifters
|
Level
Shifter 1
|
Level
Shifter 2
|
Level
Shifter 3
|
Slot
1
|
V10M3-V9M1
|
U11M16-U10M14
|
V3M6-V2M8
|
Slot
2
|
U11M17-V11M3
|
U9M14-U11M11
|
V1M8-V1M10
|
Slot
3
|
V9M7-V9M5
|
U10M11-U9M9
|
U6M1-U5M3
|
Slot 4
|
V11M9-V10M7
|
U11M8-U10M6
|
U4M3-U6M6
|
Slot 5
|
V10M12-V9M10
|
U9M6-U11M3
|
U5M6-U4M8
|
Slot 6
|
V9M15-V11M12
|
U10M3-U9M1
|
U6M9-U5M11
|
Slot 7
|
V11M17-V10M15
|
U7M1-V8M11
|
V2M3-V1M5
|
Slot 8
|
X1M4-X2M1
|
U7M3-V8M9
|
U1M11-V3M3
|
Slot 9
|
X1M8-X2M5
|
U7M5-V8M7
|
U3M9-U2M11
|
Slot 10
|
X1M12-X2M9
|
U7M7-V8M5
|
U2M6-U1M8
|
Slot 11
|
X2M16-X2M13
|
U7M9-V8M3
|
U1M3-U3M6
|
Slot 12
|
U7M12-U8M15
|
U7M11-V8M1
|
U3M1-U2M3
|
Slot 13
|
V8M12-V7M15
|
V4M8-V4M10
|
U4M11-V6M5
|
Slot 14
|
--
|
V6M6-V5M8
|
V5M3-V4M5
|
Please send any comments on this page to Ronald Gilman,
gilman@jlab.org.
Ron Gilman, created July 16, 2006, last modified July
22, 2006