1.) Chamber:
A subcontract to build the GEM detector has been awarded by
Louisiana Tech to Idaho State University. The contract will
expire at the end of August unless the MRI grant is renewed.
Ertalyte material has arrived at ISU to construct the chambers.
The material is from the same vendor which supplied the R2
ertalyte. Machining the chamber will begin in 2 weeks.
A
final design
of the GEM preeamplifiers has been completed. The width has
been increase from 11 to 12 cm otherwise the geometry is the same to
what was
described previously. Tech-Etch and CERN have submitted a
quotes to manufacture the GEM foils. Tech-Etch has promised
delivery in 3 weeks after receiving a PO. The paperwork is underway.
Design of the polar charge collector has also begun and the connector
used by the VFAT board will be used to output the signals.
Parts which remaing to be acquired: Charge collector, Output
connectors, G10 nuts & bolts, Kapton Windows.
2.)Readout electronics
An I2C interface card and a I/O VME module with LVDS connectors
have arrived. The interface card is talking to a test chip but we
have not succeeded talking to the VFAT board yet (we need to
install pull up resistors). The LVDS I/O
module will be used to slowly transfer the VFAT LVDS signal to
the VME backplane and then to CODA. I am not
convinced it will be fast enough for Qweak but it will be for
other GEM applications being developed at ISU.
LaTech's progress:
Steve Wells made contact with the folks at
CERN (TOTEM experiment) who developed the VFAT based front end
cards, who advised me that the only spares they had went to Tony
at ISU. So, rather than Tony and Steve working on the same part of
the electronics in parallel, we decided that the best use of my
time was to concentrate on hardware and software to take the LVDS
signals from the VFAT card through a dedicated VME module, which
will store the signals in memory and send them to the VME
backplane for CODA readout. Steve Wells has requested quotes for various
VME modules which can do this, and am awaiting the quotes. Once
the quotes are in,
Steve will purchase one such module, and test it. Steve has all the
hardware in place to generate test LVDS signals as input to the
module. The lion's share of the work will be programming the
FPGA's, but Steve has experience in programming Altera PLD's (which
are very similar), so the learning curve shouldn't be too steep.
A junction box needs to be developed to patch LVDS signals from
12 VFAT boads to the VME crate and I2C signals from the VFAT to a
I2C interface.
3.) rotator
LaTech has hired two students who have successfully resurrected the rotator software (Windows based), and have the rotator rotating. The next step is to create a control GUI with MEDM under the EPICS controls. We have downloaded MEDM and EPICS from JLab, and are currently trying to get it installed by our system manager. Once working, we will have the students write an MEDM based GUI to control the rotator. This should be directly portable to JLab. (To assist this process, Steve Wells has obtained the software for an existing MEDM GUI - the Hall C Moller control.)