Multiuse Advanced Digital Readouts Using 3D Stacking

Conference Date
to
Conference Location

Jefferson Lab
CEBAF Center
L102

Recent advances in semiconductor 3D integration technology could enable modularity in sensors: An advanced digital chip may be combined with a separately fabricated analog detector front end and a separate detector. This technology will enable common use of highly capable but expensive digital components across sensing mode (imaging, photon counting, photon timing, etc) and wave band (gamma through LWIR). We report on recent efforts to produce an advanced digital imaging platform in an advanced (14nm) CMOS process as part of the DARPA ReImagine program. We give an overview of status and capabilities of the two digital chips produced to date, organized on Field Programmable Gate Array (FPGA) and System on a Chip (SoC) architectures respectively. We hope to spark a community discussion about potential uses of advanced digital circuitry and digital 3D integration for HEP sensing modalities such as self-triggering, photon counting and timing, and computational imaging.

Richard Younger joined MIT Lincoln Laboratory in 2000 as a test engineer for a photonic analog to digital converter. Since then, he has participated in teams developing a wide variety of innovative optical and imaging sensors for Lidar, optical communications and computational imaging. Richard has enjoyed working on many aspects of imager design, from digital test, debugging and optical testing to writing new performance metrics for single photon detectors. Most recently, he led the implementation of the first and second generation ReImagine chips, managing the efforts of dozens of full and part time engineers and contractors through design, implementation and test of advanced hardware and software.